/*
 * w5100_spi.h
 *
 *  Created on: 27/01/2013
 *      Author: brent_000
 */

#ifndef W5100_SPI_H_
#define W5100_SPI_H_

#define WIZNET_SLAVE_POS 0 // 1ST POSITION ON SPI BUS
#define WRITE 0xF0
#define READ 0x0F

// Common registers
/*#define ADDR_COM_MODE		0x0000

#define ADDR_COM_GAR0		0x0001
#define ADDR_COM_GAR1		0x0002
#define ADDR_COM_GAR2		0x0003
#define ADDR_COM_GAR3		0x0004

#define ADDR_COM_SUBR0		0x0005
#define ADDR_COM_SUBR1		0x0006
#define ADDR_COM_SUBR2		0x0007
#define ADDR_COM_SUBR3		0x0008

#define ADDR_COM_SHAR0		0x0009
#define ADDR_COM_SHAR1		0x000A
#define ADDR_COM_SHAR2		0x000B
#define ADDR_COM_SHAR3		0x000C
#define ADDR_COM_SHAR4		0x000D
#define ADDR_COM_SHAR5		0x000E

#define ADDR_COM_SIPR0		0x000F
#define ADDR_COM_SIPR1		0x0010
#define ADDR_COM_SIPR2		0x0011
#define ADDR_COM_SIPR3		0x0012

#define ADDR_COM_RMSR		0x001A
#define ADDR_COM_TMSR		0x001B*/

/* Socket registers, & with sub-register addr for full addr
#define SOCKET0				0x04
#define SOCKET1				0x05
#define SOCKET2				0x06
#define SOCKET3				0x07

// Socket sub-registers, these are cloned for each socket above
#define Sn_MR 				0x00
#define Sn_CR 				0x01
#define Sn_IR 				0x02
#define Sn_SR 				0x03
#define Sn_PORT 			0x04
#define Sn_DHAR 			0x06
#define Sn_DIPR 			0x0C
#define Sn_DPORT 			0x10
#define Sn_TX_FSR 			0x20
#define Sn_TX_WR 			0x24
#define Sn_RX_RSR 			0x26
#define Sn_RX_RD 			0x28*/


// From Wiznet w5100 driver w5100.h
#define MR __DEF_IINCHIP_MAP_BASE__
#define IDM_OR ((__DEF_IINCHIP_MAP_BASE__ + 0x00))
#define IDM_AR0 ((__DEF_IINCHIP_MAP_BASE__ + 0x01))
#define IDM_AR1 ((__DEF_IINCHIP_MAP_BASE__ + 0x02))
#define IDM_DR ((__DEF_IINCHIP_MAP_BASE__ + 0x03))


/**
 @brief Gateway IP Register address
 */
#define GAR0				(COMMON_BASE + 0x0001)
#define GAR1				(COMMON_BASE + 0x0002)
#define GAR2				(COMMON_BASE + 0x0003)
#define GAR3				(COMMON_BASE + 0x0004)
/**
 @brief Subnet mask Register address
 */
#define SUBR0			(COMMON_BASE + 0x0005)
#define SUBR1			(COMMON_BASE + 0x0006)
#define SUBR2			(COMMON_BASE + 0x0007)
#define SUBR3			(COMMON_BASE + 0x0008)
/**
 @brief Source MAC Register address
 */
#define SHAR0				(COMMON_BASE + 0x0009)
#define SHAR1				(COMMON_BASE + 0x000A)
#define SHAR2				(COMMON_BASE + 0x000B)
#define SHAR3				(COMMON_BASE + 0x000C)
#define SHAR4				(COMMON_BASE + 0x000D)
#define SHAR5				(COMMON_BASE + 0x000E)
/**
 @brief Source IP Register address
 */
#define SIPR0				(COMMON_BASE + 0x000F)
#define SIPR1				(COMMON_BASE + 0x0010)
#define SIPR2				(COMMON_BASE + 0x0011)
#define SIPR3				(COMMON_BASE + 0x0012)
/**
 @brief Interrupt Register
 */
#define IR					(COMMON_BASE + 0x0015)
/**
 @brief Interrupt mask register
 */
#define IMR					(COMMON_BASE + 0x0016)
/**
 @brief Timeout register address( 1 is 100us )
 */
#define RTR0				(COMMON_BASE + 0x0017)
/**
 @brief Retry count reigster
 */
#define RCR						(COMMON_BASE + 0x0019)
/**
 @brief Receive memory size reigster
 */
#define RMSR			(COMMON_BASE + 0x001A)
/**
 @brief Transmit memory size reigster
 */
#define TMSR			(COMMON_BASE + 0x001B)
/**
 @brief Authentication type register address in PPPoE mode
 */
#define PATR0					(COMMON_BASE + 0x001C)
//#define PPPALGO (COMMON_BASE + 0x001D)
#define PTIMER (COMMON_BASE + 0x0028)
#define PMAGIC (COMMON_BASE + 0x0029)

/**
 @brief Unreachable IP register address in UDP mode
 */
#define UIPR0				(COMMON_BASE + 0x002A)
/**
 @brief Unreachable Port register address in UDP mode
 */
#define UPORT0			(COMMON_BASE + 0x002E)

/**
 @brief socket register
*/
#define CH_BASE (COMMON_BASE + 0x0400)
/**
 @brief	size of each channel register map
 */
#define CH_SIZE		0x0100
/**
 @brief socket Mode register
 */
#define Sn_MR(ch)		(CH_BASE + ch * CH_SIZE + 0x0000)
/**
 @brief channel Sn_CR register
 */
#define Sn_CR(ch)				(CH_BASE + ch * CH_SIZE + 0x0001)
/**
 @brief channel interrupt register
 */
#define Sn_IR(ch)			(CH_BASE + ch * CH_SIZE + 0x0002)
/**
 @brief channel status register
 */
#define Sn_SR(ch)			(CH_BASE + ch * CH_SIZE + 0x0003)
/**
 @brief source port register
 */
#define Sn_PORT0(ch)		(CH_BASE + ch * CH_SIZE + 0x0004)
#define Sn_PORT1(ch)		(CH_BASE + ch * CH_SIZE + 0x0005)
/**
 @brief Peer MAC register address
 */
#define Sn_DHAR0(ch)			(CH_BASE + ch * CH_SIZE + 0x0006)
/**
 @brief Peer IP register address
 */
#define Sn_DIPR0(ch)			(CH_BASE + ch * CH_SIZE + 0x000C)
#define Sn_DIPR1(ch)			(CH_BASE + ch * CH_SIZE + 0x000D)
#define Sn_DIPR2(ch)			(CH_BASE + ch * CH_SIZE + 0x000E)
#define Sn_DIPR3(ch)			(CH_BASE + ch * CH_SIZE + 0x000F)
/**
 @brief Peer port register address
 */
#define Sn_DPORT0(ch)		(CH_BASE + ch * CH_SIZE + 0x0010)
#define Sn_DPORT1(ch)		(CH_BASE + ch * CH_SIZE + 0x0011)
/**
 @brief Maximum Segment Size(Sn_MSSR0) register address
 */
#define Sn_MSSR0(ch)					(CH_BASE + ch * CH_SIZE + 0x0012)
/**
 @brief Protocol of IP Header field register in IP raw mode
 */
#define Sn_PROTO(ch)			(CH_BASE + ch * CH_SIZE + 0x0014)
/**
 @brief IP Type of Service(TOS) Register
 */
#define Sn_TOS(ch)						(CH_BASE + ch * CH_SIZE + 0x0015)
/**
 @brief IP Time to live(TTL) Register
 */
#define Sn_TTL(ch)						(CH_BASE + ch * CH_SIZE + 0x0016)

/**
 @brief Transmit free memory size register
 */
#define Sn_TX_FSR0(ch)	(CH_BASE + ch * CH_SIZE + 0x0020)
/**
 @brief Transmit memory read pointer register address
 */
#define Sn_TX_RD0(ch)			(CH_BASE + ch * CH_SIZE + 0x0022)
#define Sn_TX_RD1(ch)			(CH_BASE + ch * CH_SIZE + 0x0022)
/**
 @brief Transmit memory write pointer register address
 */
#define Sn_TX_WR0(ch)			(CH_BASE + ch * CH_SIZE + 0x0024)
#define Sn_TX_WR1(ch)			(CH_BASE + ch * CH_SIZE + 0x0025)
/**
 @brief Received data size register
 */
#define Sn_RX_RSR0(ch)	(CH_BASE + ch * CH_SIZE + 0x0026)
#define Sn_RX_RSR1(ch)	(CH_BASE + ch * CH_SIZE + 0x0027)
/**
 @brief Read point of Receive memory
 */
#define Sn_RX_RD0(ch)			(CH_BASE + ch * CH_SIZE + 0x0028)
/**
 @brief Write point of Receive memory
 */
#define Sn_RX_WR0(ch)			(CH_BASE + ch * CH_SIZE + 0x002A)



/* MODE register values */
#define MR_RST			0x80 /**< reset */
#define MR_PB			0x10 /**< ping block */
#define MR_PPPOE		0x08 /**< enable pppoe */
#define MR_LB  		0x04 /**< little or big endian selector in indirect mode */
#define MR_AI			0x02 /**< auto-increment in indirect mode */
#define MR_IND			0x01 /**< enable indirect mode */

/* IR register values */
#define IR_CONFLICT	0x80 /**< check ip confict */
#define IR_UNREACH	0x40 /**< get the destination unreachable message in UDP sending */
#define IR_PPPoE		0x20 /**< get the PPPoE close message */
#define IR_SOCK(ch)	(0x01 << ch) /**< check socket interrupt */

/* Sn_MR values */
#define Sn_MR_CLOSE		0x00		/**< unused socket */
#define Sn_MR_TCP		0x01		/**< TCP */
#define Sn_MR_UDP		0x02		/**< UDP */
#define Sn_MR_IPRAW	0x03		/**< IP LAYER RAW SOCK */
#define Sn_MR_MACRAW	0x04		/**< MAC LAYER RAW SOCK */
#define Sn_MR_PPPOE		0x05		/**< PPPoE */
#define Sn_MR_ND		0x20		/**< No Delayed Ack(TCP) flag */
#define Sn_MR_MULTI		0x80		/**< support multicating */


/* Sn_CR values */
#define Sn_CR_OPEN		0x01		/**< initialize or open socket */
#define Sn_CR_LISTEN		0x02		/**< wait connection request in tcp mode(Server mode) */
#define Sn_CR_CONNECT	0x04		/**< send connection request in tcp mode(Client mode) */
#define Sn_CR_DISCON		0x08		/**< send closing reqeuset in tcp mode */
#define Sn_CR_CLOSE		0x10		/**< close socket */
#define Sn_CR_SEND		0x20		/**< updata txbuf pointer, send data */
#define Sn_CR_SEND_MAC	0x21		/**< send data with MAC address, so without ARP process */
#define Sn_CR_SEND_KEEP	0x22		/**<  send keep alive message */
#define Sn_CR_RECV		0x40		/**< update rxbuf pointer, recv data */

#ifdef __DEF_IINCHIP_PPP__
	#define Sn_CR_PCON				0x23
	#define Sn_CR_PDISCON			0x24
	#define Sn_CR_PCR					0x25
	#define Sn_CR_PCN					0x26
	#define Sn_CR_PCJ					0x27
#endif

/* Sn_IR values */
#ifdef __DEF_IINCHIP_PPP__
	#define Sn_IR_PRECV			0x80
	#define Sn_IR_PFAIL			0x40
	#define Sn_IR_PNEXT			0x20
#endif
#define Sn_IR_SEND_OK			0x10		/**< complete sending */
#define Sn_IR_TIMEOUT			0x08		/**< assert timeout */
#define Sn_IR_RECV				0x04		/**< receiving data */
#define Sn_IR_DISCON				0x02		/**< closed socket */
#define Sn_IR_CON					0x01		/**< established connection */

/* Sn_SR values */
#define SOCK_CLOSED				0x00		/**< closed */
#define SOCK_INIT 				0x13		/**< init state */
#define SOCK_LISTEN				0x14		/**< listen state */
#define SOCK_SYNSENT	   		0x15		/**< connection state */
#define SOCK_SYNRECV		   	0x16		/**< connection state */
#define SOCK_ESTABLISHED		0x17		/**< success to connect */
#define SOCK_FIN_WAIT			0x18		/**< closing state */
#define SOCK_CLOSING		   	0x1A		/**< closing state */
#define SOCK_TIME_WAIT			0x1B		/**< closing state */
#define SOCK_CLOSE_WAIT			0x1C		/**< closing state */
#define SOCK_LAST_ACK			0x1D		/**< closing state */
#define SOCK_UDP				0x22		/**< udp socket */
#define SOCK_IPRAW			   0x32		/**< ip raw mode socket */
#define SOCK_MACRAW			   0x42		/**< mac raw mode socket */
#define SOCK_PPPOE				0x5F		/**< pppoe socket */

/* IP PROTOCOL */
#define IPPROTO_IP              0           /**< Dummy for IP */
#define IPPROTO_ICMP            1           /**< Control message protocol */
#define IPPROTO_IGMP            2           /**< Internet group management protocol */
#define IPPROTO_GGP             3           /**< Gateway^2 (deprecated) */
#define IPPROTO_TCP             6           /**< TCP */
#define IPPROTO_PUP             12          /**< PUP */
#define IPPROTO_UDP             17          /**< UDP */
#define IPPROTO_IDP             22          /**< XNS idp */
#define IPPROTO_ND              77          /**< UNOFFICIAL net disk protocol */
#define IPPROTO_RAW             255         /**< Raw IP packet */



#ifdef __DEF_IINCHIP_PPP__
extern alt_u8 pppinit(alt_u8 *id, alt_u8 idlen, alt_u8 *passwd, alt_u8 passwdlen);
extern alt_u8 pppterm(alt_u8 *mac,alt_u8 *sessionid);
#endif







#endif /* W5100_SPI_H_ */

